April 2000
CS202 : COMPUTER ARCHITECTURE AND DATA COMMUNICATIONS

QUESTION 4

Total Marks: 15 Marks

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Question 4

(a)When I/O devices and memory share the same address space,what is the arrangement called?[1 mark ]
The arrangement is called Memory-mapped I/O.

(b)A diagram illustrating the situation described above is as follows:

Explain how this arrangement enables a processor to direct data to a particular I/O device.[4 marks ]
Award marks for these points,or other valid explanations:
The processor,memory,and the I/O devices are connected to the bus (1),which consists of three sets of lines,namely the address,data and control lines. Each I/O device is assigned a unique set of addresses.(1)
When the processor places a particular address on the address lines,the device that recognises this address responds to the commands issued on the control lines.(1) The processor requests either a read or a write operation,and the requested data is then transferred over the data lines (1).

(c)Besides READ and WRITE o erations,an I/O module may receive two other main types of command.Explain what these are,giving a typical use for each.[6 marks ]
1.Control (1).Used to activate a peripheral and/or give some instruction (1).e.g. rewind magnetic tape.(1)
2.Test (1).Program uses this to discover status of I/O module and/or peripherals (1). e.g.is printer on-line?(1)
Allow credit for alternative explanations,and alternative valid examples.

(d)In a situation like that pictured above,DMA may be used,and it may utilise cycle stealing .Explain what this means.[4 marks ]
Award marks for these or other valid comments:
Cycle stealing is a strategy w ereby the DMA module uses the system bus to move data between the I/O module/external device at times when the CPU is not using the bus (1). The CPU is suspended just before it needs to use the bus (1).The DMA module transfers one word and returns control to CPU (1).It is not an interrupt because the CPU does not change state;it does not jump to any special service routine;it is just paused for one or more cycles (1).