| 4. |
Design a 4-input priority encoder
for the inputs and outputs shown in the table below. Input D3, the most
significant bit, has the highest priority. |
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The valid output designated by V
is set to 1 only when one or more of the inputs are equal to 1. If all inputs are 0, V is
equal to 0 and the other two outputs of the circuit are not used. |
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(i) Complete the truth table |
[6] |
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two marks for
each correct column: A1, A0, and V: deduct a mark for each error,
down to zero |
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[6
marks] |
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(ii) Draw the K-map for A1
and A0 |
[4] |
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two marks for
the correct map; deduct a mark for each error, down to zero |
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two marks for
the correct map: deduct a mark for each error, down to zero |
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[4
marks] |
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(iii) Show the simplified Boolean
expression for all 3 outputs |
[4] |
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one mark for
V, one mark for A, and two marks for A0 |
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[4
marks] |
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(iv) Draw the logic diagram for
the 4-input priority encoder with the minimum number of gates |
[4] |
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one mark for
correct input to the OR gate for V, one mark for correct input to the OR gate for A, and
two marks for correct input to the OR gate for A0. |
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[4
marks] |
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(v) How does an ordinary encoder
differ from a priority encoder? |
[2] |
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In a
priority encoder, the output code corresponds to the highest-numbered input that is
activated; |
[1] |
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in an
ordinary encoder, only one of the input lines should be activated at a given time. |
[1] |
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[2
marks] |
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