Aug 1999 CS202 : Computer Architecture and Data Communications (Question 1) Suggested Solutions

(a)	Here are some descriptions of commands which affect the bus in some way. For each one, identify the corresponding control line.
	(i) Causes the data on the bus to be written into addressed location. (ii) used to synchronize operations. (iii) Causes the data from the addressed I/O port to be placed on the bus. (iv) Initializes all modules. (v) Acknowledges that the pending interrupt has been recognized.	[5]
	(i) Memory Write (ii) Clock (iii) I/O Read (iv) Reset (v) Interrupt Acknowledgement
(b)	Given the following memory values and register sets in a 1-address machine, what values do the following instructions load into the accumulator? Word 60 contains 80 R1 contains R2 Word 70 contains 90 R2 contains 290 Word 80 contains 92 R3 contains 80 Word 90 contains 95 R4 contains 90 (I) Load Direct 80 (ii) Load Indirect 70 (iii) Load Register Indirect R3 (iv) Load Register R4 (v) Load Immediate 60	[5]
	(i) 92 (ii) 95 (iii) 92 (iv) 90 (v) 60
(c)	For each of the following Information Communication techniques, give the definition and an area of application.
	(i) Telecommunications (ii) Data Communications (iii) Teleprocessing	[2] [2] [2]
	(i) Telecommunications Refers to the electronic transmission of any type of electronic information. Encompasses telephone communications, transmission of television signals. (ii) Data Communications The movement of encoded information from one point to another by means of electrical or optical transmission systems, usually used in communication networks. (iii) Teleprocessing Refers to the accessing of computing power and computerised data files from a distance, generally using terminals and telecommunication lines.
(d)	The I/O module provides an interface between the CPU/memory and peripheral devices. One task it performs is error detection. Describe two other tasks carried out by the I/O module.	[4]
	Any two from: Control and Timing. Co-ordinate traffic flow/ sharing of bus/ memory between CPU and various I/O activities. CPU Communication. Command decoding/ Status reporting/ Address recognition. Device Communication. Transferring commands/ data/ status information to/ from external device. Data Buffering. To compensate for mis-match between speed of CPU, memory and I/O devices.