April 2000
LD201 : LOGIC DESIGN

QUESTION 4

Total Marks: 15 Marks

• Question 1
• Question 2
• Question 3
• Question 5
• Cover Page

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SUGGESTED SOLUTIONS
for Question 4

(a) Describe two ways of using an n-bit two’s-complement parallel adder to perform n-bit subtraction. [3 marks]

(b) Design a circuit to perform addition and subtraction of 3-bit two’s-complement numbers. Used XOR gates, and have a control input A/S’. Label your circuit design clearly. [4 marks]

(c) Redesign the above circuit to use XNOR gates instead of XOR gates. [4 marks]

(d) Explain how to detect overflow in addition and subtraction of two’s-complement numbers. In each, give an expression characterizing overflow in terms of the signs S_A, S_B of the arguments, the sign S_C of the result, and the carry out C. [4 marks]