August 2000
CS202 : COMPUTER ARCHITECTURE AND DATA COMMUNICATIONS

QUESTION 2

Total Marks: 15 Marks

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Solutions and allocated marks are indicated in green.
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Question 2

(a) What is an interrupt? [2]
It is an asynchronous event that suspends the CPU from its
normal operation [1] and jumps to a pre-programmed routine to
handle the interrupt. [1]


(b) Identify and explain the five I/O objectives. [5]
(One mark each, provided explanations are given. If no
explanations are given, award up to [2] over all. )
CPU COMMUNICATION
CONTROL & TIMING
DEVICE COMMUNICATION
DATA BUFFERING
ERROR HANDLING


(c) The diagram below is a representation of one of the techniques for determining an interrupt. Identify the technique and explain what actions are being performed. [5]

The interrupt technique is the: SOFTWARE POLL. [1] Here, the processor sends out an instruction [1] to test the status register of the I/O module, [1] which it duly returns to the processor. [1] If this is not identified as the interrupting module, the processor will repeat the process until the I/O module is identified. [1]
Award marks for other valid points. [5 marks]

(d) The technique of part (c) uses a single channel architecture known as memory-mapped. What are some of the disadvantages associated with using a single channel? [3]
Attaching/ the assignment of priority to I/O modules. [1 or 2] Resource sharing over the use of the System Bus. [1 or 2]
(In each case, award [1] if the answer is heading in the right direction, and [2] if it properly explains the issue. Of course, no one may score more than [3] over all. Other reasonable answers are also acceptable)