December
1998 QUESTION 2 Total Marks: 20 Marks |
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| (a) | With the aid of a diagram, show how the
fetch-execute cycle incorporates a check for interrupts.
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[6] |
| (b) | An instruction such as LOAD M loads the
data at the address M into the accumulator. Using a diagram, show how many memory
reads are needed to fetch the instruction, given that both the opcode field and
the main memory are 1 byte wide. The starting address (program counter) is FEDC
and the instruction is LOAD A114.
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[6] |
| (c) | The bus connects a number of different devices.
Describe (with source and destination) two types of transfer that an interconnection bus
structure must support.
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[3] |
| (d) | A computer system has a 128-bit instruction word and uses a 3-address format. There are 155 different general-purpose registers available. Assume that the use of any of these registers is required in a particular instruction - i.e. the appropriate register must be specified in the instruction word as a special field. If there are 200 different opcodes/instructions available for the system, what instruction format is needed? Show how you calculate your answer. | [5] |